1. Field of the Invention
This invention relates to a phase locked loop, a signal generating apparatus and a synchronization method wherein a phase error signal outputted from a phase comparator circuit is supplied to a control-type oscillator so as to execute synchronization and frequency conversion based on an input signal, thereby outputting a high frequency signal.
2. Description of the Related Art
FIG. 6 is a block diagram of a related phase locked loop (PLL: Phase Locked Loop). Such a phase locked loop is widely applied to a signal generating apparatus such as a digital modulation signal generating apparatus, and also to various devices.
The phase locked loop shown in FIG. 6 includes a reference signal generator 101, a phase comparator circuit 105, a loop filter 106, a control-type oscillator 107, a frequency converter 108 such as a frequency divider, and a modulation signal generator 109.
While modulation is not performed, an output signal 107a synchronous with a reference signal 101a from the reference signal generator 101 is outputted from the control-type oscillator 107.
While the modulation is performed, a modulation signal 109a generated by the modulation signal generator 109 is added to an output signal 106a from the loop filter 106, thus producing a control signal for the control-type oscillator 107. (For example, refer to JP-A-2002-290155 and JP-A-1-129615.)
In the phase-locked loop shown in FIG. 6, the modulation signal is added to the frequency adjusting terminal of the control-type oscillator so that the control-type oscillator is directly modulated by the modulation signal.
However, in this case, as seen from FIG. 7, the phase locked loop has a highpass characteristic with respect to a modulation input. Therefore, in order to perform the modulation at a low frequency, the loop band must be sufficiently narrow with respect to the modulation frequency. However, narrowing the loop band facilitates the modulation at the low frequency, but also narrows the lock-in range. This leads a problem of making it difficult to acquire the synchronization of the loop. There is also a problem of making it impossible to effect the modulation from DC because of the highpass characteristic.
In order to make the modulation gain flat, a configuration as shown in FIG. 8 can be adopted.
In the example of FIG. 8, a modulation signal 109a generated by a modulation signal generator 109 is supplied to a modulator 110 through a modulator-input circuit 111, thereby generating a modulated wave 110a. Thus, the loop outputs, from the control-type oscillator 107, the output signal 107a synchronous with the modulated wave 110a. On the other hand, a correction signal 112a generated by a correction signal generating circuit 112 is added to the output signal 106a from the loop filter 106, thus producing the control signal for the control-type oscillator 107.
In this way, the modulation signal 109a is applied to the modulator 110 to produce the modulated wave, and also a part of the modulation signal 109a is branched to generate the correction signal 112a, and the correction signal 112a is added to the frequency adjusting terminal of the control-type oscillator 107. In this example, within the loop band, the control-type oscillator 107 outputs the modulated wave in synchronism with the modulated wave 110a from the modulator 110, whereas outside the loop band, the control-type oscillator 107 is directly modulated by the correction signal 112a. Thus, as seen from FIG. 9A, a broad band frequency characteristic can be obtained.
However, in this case, the modulation sensitivity of the modulator 110 must be matched with the frequency characteristic of the phase locked loop. To this end, a circuit for adjusting the gain of the correction signal and the frequency characteristic must be externally provided. In order to determine the characteristic of such an adjusting circuit, the frequency characteristic of the loop filter 106, phase detecting sensitivity of the phase comparator circuit 105 and frequency characteristic of the control-type oscillator 107 must be obtained exactly. This leads to a problem of making it difficult to provide a flat frequency characteristic over a broad band. For example, as seen from FIG. 9B, irregularity in the frequency characteristic is likely to occur.
Further, as seen from FIG. 10, synchronization may be ensured in a state with the lock-in range extended by making the element constant of the loop filter variable. In the example shown in FIG. 10, the constant of a loop filter 106A is switched by a constant switch 113, thereby making the loop band variable. Thus, the loop band can be appropriately selected according to the synchronizing process in the loop and the status while modulation is not performed or modulation.
In this case, in order to change the element constant, an analog switch is employed. However, in order to improve the phase noise characteristic of the loop, the element constant must be set at a low value from the point of view of suppressing thermal noise. On the other hand, there is a limit in reducing the resistance of the element constant because of the on-resistance of the analog switch. This leads to a problem of being incapable of providing the phase locked loop with an excellent phase noise.
In view of the above circumstance, it is desirable to provide a phase locked loop enabling the modulation from DC and capable of easily giving the modulation having a flat frequency characteristic over a broad band without reducing the lock-in range of the loop. Further, it is desirable to enable the modulation without providing a correction signal externally from the phase locked loop and determine the element constant of a loop filter without depending on the on-resistance of the analog switch